x86 Code Generator

How Romasm compiles to real x86 machine code

Overview

The x86 Code Generator is the component that converts Romasm VM instructions into real x86 assembly code. This enables Romasm programs to run on actual hardware instead of just in a virtual machine.

Key Feature: Your Romasm code is compiled to native x86 assembly, assembled by NASM, and can run on real processors!

Register Mapping

Romasm registers are mapped to x86 registers:

16-bit Mode (Boot Sectors)

R0 (I) → AX
R1 (II) → BX
R2 (III) → CX
R3 (IV) → DX
R4 (V) → SI
R5 (VI) → DI
R6 (VII) → BP
R7 (VIII) → SP

32-bit Mode (Protected Mode)

R0 (I) → EAX
R1 (II) → EBX
R2 (III) → ECX
R3 (IV) → EDX
R4 (V) → ESI
R5 (VI) → EDI
R6 (VII) → EBP
R7 (VIII) → ESP

Note: With smart register allocation enabled, the mapping can be optimized based on register liveness and interference analysis.

Instruction Translation

Romasm VM instructions are translated to x86 assembly:

Romasm → x86 Assembly
LOAD R0, 42 → MOV AX, 42
LOAD R0, 0 → XOR AX, AX (optimized)
ADD R0, R1 → ADD AX, BX
LOAD R0, [R1] → MOV AX, [BX]
LOAD R0, [R1] → MOV AL, BYTE [BX] (8-bit)
                XOR AH, AH (zero-extend)
CALL bios_putc → CALL bios_putc
INT 0x10 → INT 0x10
CMP R0, R1 → CMP AX, BX
JEQ label → JE label
JMP label → JMP label

Boot Sector Generation

The generator creates proper boot sectors with:

  • BITS 16 - 16-bit mode for boot sectors
  • ORG 0x7C00 - Boot sector load address
  • Code Section - All instructions
  • Data Section - DB directives for strings/constants
  • Boot Signature - 0xAA55 at offset 510

Example Output Structure

; Boot sector generated from Romasm
BITS 16
ORG 0x7C00

start:
    XOR AX, AX
    MOV DS, AX
    ... (code) ...

bios_putc:
    PUSH BX
    ... (BIOS functions) ...

; Data section
msg:
    db 72, 101, 108, ...

; Boot signature
times 510 - ($ - $$) db 0
dw 0xAA55

Smart Register Allocation

When enabled, the generator uses advanced register allocation:

  • Liveness Analysis: Tracks when registers are first and last used
  • Interference Graph: Identifies which registers conflict
  • Greedy Allocation: Assigns registers to minimize conflicts
  • Register Reuse: Reuses freed registers when possible

Benefits: Better register utilization, fewer conflicts, reduced spills, improved code quality

Special Features

8-bit Register Support

Correctly handles byte operations:

LOAD8 R0, [R1] → MOV AL, BYTE [BX]
                    XOR AH, AH ; zero-extend

Memory Addressing

Supports various addressing modes:

LOAD R0, 42 ; Immediate
LOAD R0, R1 ; Register
LOAD R0, [R1] ; Memory via register
LOAD R0, msg ; Label address
LOAD R0, [0x1234] ; Absolute address

BIOS Interrupt Handling

Correctly generates BIOS interrupt calls:

INT 0x10 ; Video services
INT 0x16 ; Keyboard services
INT 0x13 ; Disk services

Usage

The x86 generator is automatically used by the build system:

const generator = new RomasmX86Generator(true); // Enable smart allocation
const x86Asm = generator.generateBootSector(
    instructions, // From assembler
    data, // Data bytes
    labels // Label addresses
);

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